Module stabilizer::hardware::design_parameters

Constants

• ADC_DAC_SCK_MAX
  The maximum DAC/ADC serial clock line frequency. This is a hardware limit.
• ADC_SETUP_TIME
  The ADC setup time is the number of seconds after the CSn line goes low before the serial clock may begin. This is used for performing the internal ADC conversion.
• DDS_MULTIPLIER
  The multiplier used for the DDS reference clock PLL.
• DDS_REF_CLK
  The DDS reference clock frequency in MHz.
• DDS_SYNC_CLK_DIV
  The divider from the DDS system clock to the SYNC_CLK output (sync-clk is always 1/4 of sysclk).
• DDS_SYSTEM_CLK
  The DDS system clock frequency after the internal PLL multiplication.
• MAX_SAMPLE_BUFFER_SIZE
  The maximum ADC/DAC sample processing buffer size.
• POUNDER_IO_UPDATE_DELAY
  The delay after initiating a QSPI transfer before asserting the IO_Update for the pounder DDS.
• POUNDER_IO_UPDATE_DURATION
  The duration to assert IO_Update for the pounder DDS.
• POUNDER_QSPI_FREQUENCY
  The QSPI frequency for communicating with the pounder DDS.
• SYSCLK
  The system clock, used in various timer calculations
• TIMER_FREQUENCY
  The optimal counting frequency of the hardware timers used for timestamping and sampling.
• TIMER_PERIOD

Type Aliases

• SampleBuffer