stabilizer/hardware/input_stamper.rs
1//! Digital Input 0 (DI0) reference clock timestamper
2//!
3//! This module provides a means of timestamping the rising edges of an external reference clock on
4//! the DI0 with a timer value from TIM5.
5//!
6//! # Design
7//! An input capture channel is configured on DI0 and fed into TIM5's capture channel 4. TIM5 is
8//! then run in a free-running mode with a configured tick rate (PSC) and maximum count value
9//! (ARR). Whenever an edge on DI0 triggers, the current TIM5 counter value is captured and
10//! recorded as a timestamp. This timestamp can be either directly read from the timer channel or
11//! can be collected asynchronously via DMA collection.
12//!
13//! To prevent silently discarding timestamps, the TIM5 input capture over-capture flag is
14//! continually checked. Any over-capture event (which indicates an overwritten timestamp) then
15//! triggers a panic to indicate the dropped timestamp so that design parameters can be adjusted.
16//!
17//! # Tradeoffs
18//! It appears that DMA transfers can take a significant amount of time to disable (400ns) if they
19//! are being prematurely stopped (such is the case here). As such, for a sample batch size of 1,
20//! this can take up a significant amount of the total available processing time for the samples.
21//! This module checks for any captured timestamps from the timer capture channel manually. In
22//! this mode, the maximum input clock frequency supported is dependant on the sampling rate and
23//! batch size.
24//!
25//! This module only supports DI0 for timestamping due to trigger constraints on the DIx pins. If
26//! timestamping is desired in DI1, a separate timer + capture channel will be necessary.
27use super::{hal, timers};
28
29/// The timestamper for DI0 reference clock inputs.
30pub struct InputStamper {
31 _di0_trigger: hal::gpio::gpioa::PA3<hal::gpio::Alternate<2>>,
32 capture_channel: timers::tim5::Channel4InputCapture,
33}
34
35impl InputStamper {
36 /// Construct the DI0 input timestamper.
37 ///
38 /// # Args
39 /// * `trigger` - The capture trigger input pin.
40 /// * `timer_channel - The timer channel used for capturing timestamps.
41 pub fn new(
42 trigger: hal::gpio::gpioa::PA3<hal::gpio::Alternate<2>>,
43 timer_channel: timers::tim5::Channel4,
44 ) -> Self {
45 // Utilize the TIM5 CH4 as an input capture channel - use TI4 (the DI0 input trigger) as the
46 // capture source.
47 let mut input_capture =
48 timer_channel.into_input_capture(timers::tim5::CaptureSource4::Ti4);
49
50 // Do not prescale the input capture signal - require 8 consecutive samples to record an
51 // incoming event - this prevents spurious glitches from triggering captures.
52 input_capture.configure_filter(timers::InputFilter::Div1N8);
53
54 Self {
55 capture_channel: input_capture,
56 _di0_trigger: trigger,
57 }
58 }
59
60 /// Start to capture timestamps on DI0.
61 #[allow(dead_code)]
62 pub fn start(&mut self) {
63 self.capture_channel.enable();
64 }
65
66 /// Get the latest timestamp that has occurred.
67 ///
68 /// # Note
69 /// This function must be called at least as often as timestamps arrive.
70 /// If an over-capture event occurs, this function will clear the overflow,
71 /// and return a new timestamp of unknown recency an `Err()`.
72 /// Note that this indicates at least one timestamp was inadvertently dropped.
73 #[allow(dead_code)]
74 pub fn latest_timestamp(&mut self) -> Result<Option<u32>, Option<u32>> {
75 self.capture_channel.latest_capture()
76 }
77}